The term "printed board" ("PB") is understood to be a general term for completely processed printed circuit or printed wiring configurations. It includes rigid or flexible boards (organic or ceramic) and single, double, and multilayer printed boards. A "printed wiring board (`PWB`)" is a subset of the PB. It is a board with only printed-on point-to-point connections. A "printed circuit board" is another subset of PB. It is a board with printed-on components as well as point-to-point connections. In the following description, reference to PB's is intented to encompass PWB's and PCB's.
A typical PB is a flat board that holds chips and other electronic components. The board is made of fiberglass reinforced thermosetting resin laminate. It interconnects components via conductive metal pathways. The typical resins used in making PB's are brominated bisphenol A type epoxy resins, bis-maleimide resins and polyimide resins. The resin is typically impregnated into a fiberglass fabric and with compression molding. The impregnated fabris (the "prepreg") is laminated into a multi-ply structure, containing as many as 4 or more plies. Such a structure provides a high fiberglass to resin ratio.
The conventional printed circuit is an etched circuit. It is made by a photo imaged chemical etch process. A copper foil laminate is covered with a photoresist. U.V. light is shined through a negative image of the circuit paths onto the photoresist, hardening the areas that will remain after etching. The piece is then treated to remove the unhardened areas of the photoresist. When passed through an acid bath (e.g., ferric chloride solution), the exposed copper is etched away. The hardened areas of photoresist are stripped off. An oxide treatment is applied to the copper to achieve proper bonding to the next layer of laminate or for the top layer, a solder mask layer is applied. A similar process creates the microminiaturized circuits on a chip.
In particular, the electrical laminates used in PB's comprise thermosetting resin as described immediately below, impregnated glass continuous filament fiber or fabric systems which are combined with copper foil and pressed in a multi-daylight press into laminates. Laminates have either one or both sides clad with copper. Resin matrix-reinforcing systems range from moderately inexpensive materials such as phenolic/paper laminates or polyester/glass to general purpose epoxy/glass known as FR-4 to high performance (expensive) systems based on bismaleimide-triazine (BT)/glass or polyimide (PI)/glass. Most laminates are pressed/cured in multi-opening presses. At least one company manufactures an epoxy/polyester hybrid copper laminate in a continuous operation.
These different electrical laminates are distinguishable thermally by comparing their respective T.sub.g 's:
______________________________________ Tg, .degree. C. ______________________________________ Phenolic/Paper 90 Polyester/Glass .about.100 Epoxy/Glass .about.125 BT/Glass 225 PI/Glass 260 ______________________________________
Hybrids of these above resin matrices are coated onto glass and pressed/cured into laminates with intermediate T.sub.g 's:
______________________________________ Tg, .degree. C. ______________________________________ Epoxy/BT-glass 160-200 Epoxy/PI-glass 200-260 ______________________________________
The FR-4 varnish which is coated onto glass is a complex mixture of epoxy resins, catalyst, amine accelerator and solvents. Glass reinforced prepreg of brominated epoxy resin catalyzed by dicyandiamide (dicy) with an amine accelerator is "B staged" into dry prepreg sheets with flow varying from 8 to 30%. Flow values aid in selecting the proper press/cure cycle in the manufacture of multiply (FR-4) copper clad laminates. Typically these multiply prepregs are combined with copper foil and pressed in a multi-opening press at as high as 1000 psi, 350.degree. F. and requires 30 to 60 minutes for complete cure. A schematic of the overall operation is illustrated in FIG. 7.
Some excess resin flash that must be trimmed develops on the sides of the laminate and results in laminate variability. Caul plates, used in pressing the laminates, periodically build up epoxy residue causing laminate imperfections and rough surfaces. After many pressings, caul plates must be cleaned by a costly grinding/resurfacing or chemical operation.
A maximum level of resin cure is essential for ultimate mechanical properties and dimensional ability for stress free laminates. If not properly cured, problems are amplified during the ensuing processing steps leading to a PB. A partially or incompletely cured laminate causes resin smear (flow) during the drilling operation (aligning and assembling laminates into multi-layer boards). Resin flow and deposits on drill bit cause misalignment and possible rejection of the completed PB during final testing.
Mechanical and electrical properties comparison of phenolic paper and epoxy/glass (FR-4) clearly identify FR-4 as the superior material. On a cost performance basis, the FR-4 board is the predominant material for PB in the U.S. With more pre-assembled devices (surface mount devices) and a significant shift to multi-layer boards, the thermal/mechanical limits of FR-4 are being exceeded by lengthy thermal excursions caused by newer assembly technologies.
A significant problem associated with double-sided and multi-layer boards (MLB) is plated through hole (PTH). The process of forming the copper plated through hole involves fabricating holes through each of the laminate layers, preparing the hole for plating, sensitizing the hole with electroless copper and finally electroplating with copper to the desired thickness. Studies have shown that PTH can only survive "few thermal cycles" (Z axis expansion of FR-4) before copper fatigue/failure occurs. One company reports 220 ppm/.degree. C. for Z axis FR-4 by TMA mid-point between 50.degree. C. and 250.degree. C. The mismatch of coefficient of thermal expansion ("CTE mismatch") between the copper "barrel" PTH and FR-4 results in cracked pads, barrels and/or layer delamination.
This point is described by Harper and Miller, Electronic Packaging, Microelectronics, and Interconnection Dictionary, McGraw-Hill, Inc., New York, N.Y., 1993, in their definition of "Z Axis":
"(1) The direction through the thickness of a substrate, a feature especially important for printed wiring board laminates, since thermal expansion in the Z axis is much higher than in the X-Y sic! axis. This is because the resin in the laminate controls the Z axis thermal expansion, whereas the fabric in the laminate controls the X-Y axis thermal expansion. Resins have much higher! thermal expansions than do fabrics. (2) The direction perpendicular to the fibers in a woven fiber-reinforced laminate--namely, through the thickness of the laminate. Thermal expansion is much higher in the Z axis, since this expansion is more controlled by the resin in the laminate." PA1 molding is effected in a laminating press with ordinary panel-sized laminate materials (e.g., epoxy-glass, polyimide, etc.) in prepreg form; PA1 tooling cost, even for low volume, is nominal; PA1 chemicals and steps used for copper metallization is traditional, yet high, benchmark-level FR4, adhesion is achieved, as high as for preclad PB's; PA1 the following traditional PB production steps are omitted: PA1 1. transfer sheets, typically thermoplastic film or release paper, to the metal foil film, or PA1 2. through screens such as by silk screens, to the metal foil film, or PA1 3. rotogravure rolls, to the metal foil film. PA1 a) it will shape by processes such as stamping and compression molding, and the like; PA1 b) the resin is nonconductive, which means that the resin can be used as a dielectric substrate; PA1 c) it is a thin film that is sufficiently uniform in thickness in order to provide consistent heat shaping capability across the breadth of the film, and the thickness should be sufficient to accept the shape imposed by the shaping process; PA1 d) the resin can be molded by compression or stamp molding without the need for constraining flow at the edges of the resin film; PA1 e) the film possesses low flow over a broad temperature range so that it does not flow uncontrollably while undergoing cure conditions, and when placed under pressure, only the portions that are superimposed over a groove or cavity in the case of a female mold, or over a protuberance in the case of a male mold, will be caused to flow because of pressure imposed on the film; and PA1 f) the film gels or achieves properties similar to a state of gelation ("near-gel" state), over conditions leading to cure, that satisfy commercial conditions. PA1 (i) a thermosetting resin that advances in molecular weight without forming a significant volatile byproduct and PA1 (ii) a flow control component. PA1 a) an uniform areal thickness ranging from about 1 to about 250 mils (about 0.00254 cm to about 0.635 cm) as calculated from the weight of resin film for a given area; PA1 b) with minimum and maximum thicknesses not exceeding the deviation factor set forth in Table A. PA1 c) low flow at a broad temperature range; PA1 d) the ability to cure, gel, or near-gel, at temperatures from about 20.degree. C. to about 250.degree. C., in less than about 7 days and more than 1 second; PA1 e) a low dielectric constant in the thermoset state. PA1 i) one or more electronic grade fillers; PA1 ii) a thermoplastic resin that is soluble or partially soluble in the thermosetting resin; PA1 iii) an elastomer-type polymer that provide discrete elastomer phases (second phases) in the thermosetting resin matrix; PA1 iv) a thixotrope; and PA1 v) a mixture of two or more of i), ii), iii) and iv).
There are a number of improvements with respect to PB manufacture that are sought by the industry. One is in the area of cost reduction. Another relates to reduction in the capital investment of a production line to produce PB's. A third improvement involves the environmental problems that plague the current processes for making PB's. A fourth improvement is a greater circuit density that requires finer lines and spaces.
For example, the photo imaging and etch processes involve expensive capital equipment and hazardous chemicals. A photoresist coater is required, followed by a UV exposure machine, followed by a rinse that generates contaminated water waste. This is followed by an etching line that usually consists of 2 to 5 etch tanks and 10 to 15 rinse tanks, all of which generate toxic waste.
The essence of a PB is to provide the circuit pathways carrying electrical pulses from one point to another. The pulses flow through on/off switches, called transistors, located in chips, which open or close when electrically activated. The current flowing through one switch effects the opening or closing of another and so on. Small clusters of transistors form logic gates, which are the building blocks behind all this magic, and a specific combination of logic gates make up a circuit.
Today's chip is typically an integrated circuit. Chips are squares or rectangles that measure approximately from 1/16th to 5/8th of an inch on a side. They are about 1/30th of an inch thick, although only the top 1/1000th of an inch holds the actual circuits. Chips contain from a few dozen to several million electronic components (transistors, resistors, etc.). The terms chip, integrated circuit and microelectronic are synonymous. Chips are generally characterized by their function.
The chip relies on single crystal silicon wafers onto which an electrical circuit is provided. Layers of these wafers can be used to define the function of the chip. The crystal is then placed in a lead frame, with extending copper and nickel alloy leads. The frame is packaged (encapsulated) with an epoxy molding compound such as an epoxy cresol novolac ("ECN") resin. The encased chip is adhesively bonded to the PB with an epoxy resin adhesive that requires heat to cure. The chip leads are then bonded, e.g., by soldering, to the PB's metal circuitry.
The current PB technology is reaching its limits in terms of how fine circuit lines can be made economically while the decreasing sizes of portable electronic equipment will demand even finer lines.
It is well recognized that a byproduct of miniaturization of a PB and a chip is speed. The shorter the distance a pulse travels, the faster it gets there. Greater miniaturization allows greater area availability for more circuitry, thus allowing for more functions to be added to the circuit. The smaller the components making up the transistor, the faster the transistor switches. The same effect holds true with respect to a PB. Switch times of transistors are measured in billionths and trillionths of a second. In fact, a Josephson junction transistor has been able to switch in 50 quadrillionths of a second. Thus a tremendous impetus exists to reduce the size of chips and PB's, and in the case of PB's, to reduce the distance between interconnected functions on the PB.
George D. Gregoire, Dimensional Circuits Corp., San Diego, Calif., 92126 in a paper entitled "Fine-line `Grooved` Circuitry--A New PB Process for SMT," describes an evaluation of his process in making and employing common PB in surface mount technology (SMT) application, which is in part the technology described in U.S. Pat. Nos. 4,912,844 and 5,334,279. Surface mounting is a circuit board packaging technique in which the leads (pins) on the chips and components are soldered on top of the board, not through it. As a result, boards can be smaller and built faster! From this analysis, Mr. Gregoire defines what he calls "an improved circuit trace geometry and manufacturing process for PB's containing `grooved traces` or `dimensional circuitry.`" The manufacturing process employs a hot stamping approach to form dimensional circuits. According to the author, major parts of the process embrace:
production phototooling (film) PA2 dryfilm plating resist PA2 film-to-PB registration (features are molded in) PA2 imaging PA2 developing, and PA2 possibly, solder resist in its entirety.
A small amount of common etch resist is used in a "self-locating" way, bladed on, with no registration steps required. The resist is stated to be retained, and protected in the grooves, below the surface, during etching.
In defining the significance of this technology to users, Gregoire states that it dramatically improves soldering yields during fine-pitch surface mounting. He states that groove circuits provide yield improvements in the self-locating feature during assembly because the grooves or channels allow SMT IC leads to automatically self-locate. The self-locating feature provides yield and quality (e.g., much higher lead pull strength) improvements. The wide, funnel-shaped and deep channels completely wick and fill with solder, making automatic allowance for the skew and out-of-planarity problems that come with high lead count, fine-pitch ICs.
A significant deficiency of the molding step of this process is its use of thermosetting resins in prepreg form, which means that the prepreg sheet contains a glass fiber fabric to reinforce the epoxy resin. The specific ones mentioned are epoxy-glass, and polyimide, without specifying the fiber. In the latter case, it is assumed that the fiber is glass fiber. That requires the hot stamping into an unyielding fiber mass that restricts resin flow and resists well-defined debossment. Moreover, a resin-glass fiber prepreg creates a anisotropic substrate creating CTR mismatches for any copper layer deposited thereon, due to the surface irregularity of that material. As pointed out above, this results in "cracked pads, barrels and/or layer delamination," clearly indicating why such a substrate is not favored by Gregoire.
Parker, U.S. Pat. No. 4,912,844, describes punching an optionally planar surface with a punch that may be heated to impart grooves and cavities in the surface. The punch may have foil disposed on it so that it is transferred to the substrate and in the grooves and cavities in the substrate. The portions of the foil on the surface of the substrate may be removed by printed circuit techniques or machining or laser techniques so that only the portions of the foil in the grooves and the cavities remain. FIGS. 5-8 of the patent list alternative steps in producing a printed circuit. They are listed in the following table:
______________________________________ FIG. 5 FIG. 6 FIG. 7 FIG. 8 ______________________________________ Dispose a mark Machine or laser Start with a flat Press metal foil on a flat surface cut the punch to surface of a around punch of a punch. create raised punch to make foil portions. conform to raised portions of the punch. Photo expose an Heat the punch Coat the flat Heat punch and image of desired to an elevated surface with a foil to an grooves and holes temperature. photo-resist elevated tem- on the mask of material in a perature. the punch. pattern corre- sponding to the desired pattern of grooves and holes in the substrate. Etch the photo As an alternative Remove the por- As an alterna- exposed image or as an addition- tions of the tive or as an of the grooves al step, heat the punch without additional step, and holes on substrate. the photo-resist heat the the mask. material. substrate. Plate the etched Apply the punch Harden the photo- Press foil on portion of the to a surface of resist material and into sur- mask to fill the the substrate to on the substrate. face of sub- holes and grooves form the grooves strate to pro- in the mask. and holes in the duce grooves substrate. and holes in the substrate. Remove mask Remove the Heat the punch Remove foil from punch. punch from the to an elevated from surface of substrate. temperature. substrate while retaining foil in grooves and hole in sub- strate. Heat the punch Dispose electrical As an alterna- Dispose electri- to an elevated components in the tive or as an cal components temperature. holes in the sub- additional step in the holes strate. heat the sub- in the substrate. strate. As an alternative Apply an electri- Apply the punch Apply an elec- or as an addi- cally conductive to a surface of trically conduc- tional step, material such as the substrate to tive material heat the sub- solder to the form the grooves such as solder strate. grooves in the and holes in the to the grooves substrate to es- substrate. in the substrate tablish electrical to establish continuity with electrical conti- the electrical nuity with the components. electrical com- Apply the punch Remove the ponents. to a surface of punch from the the substrate to substrate. form the grooves and holes in the substrate. Remove the Dispose electrical punch from the components in the substrate. holes in the sub- strate. Dispose electrical Apply an electri- components in the cally conductive holes in the sub- material such as strate. solder to the grooves in the substrate to es- tablish electrical continuity with the electrical components. Apply an electri- cally conductive material such as solder to the grooves in the substrate to es- tablish electrical continuity with the electrical components. ______________________________________
An advantage of the PB procedure of U.S. Pat. No. 4,912,844, is the exploitation of grooves and cavities in the board to provide the printed circuit. This allows one to create the surface area needed for obtaining low electrical resistance in the wiring placed in the grooves and associated with the cavities. Note that the depth of the grooves are preferably at least as great as the widths of the grooves and since the solder can fill the grooves, the widths of the grooves can be made quite small while still retaining relatively low electrical resistance. In a number of instances, such as at column 4, lines 9-19, column 5, lines 4-8, lines 9-16, lines 18-19, the patent utilizes heating of the substrate to deform it, using temperatures up to the melting temperature of the substrate. This demonstrates that the substrate must be heated above a glass transition temperature in order to achieve flow. On the other hand, the patent also states that the PB's can be made of a ceramic or an epoxy-glass material. In addition, the patent states that the substrate may also be made of high temperature thermoplastic or thermosetting materials without specifying what they may be or their properties. The patent is devoid of details on how the metal foil is bonded to the thermosetting or thermoplastic substrate, and how one avoids a CTE mismatch, as characterized above. For example, a metal foil will not tightly bond to a thermoplastic substrate even if the substrate is melted in contact with the foil; an adhesive is required to effect reasonable bonding of the foil to the thermoplastic substrate. This appears to be recognized in the Gregoire's recently issued U.S. Pat. No. 5,390,412 that specifies the use of an "adhesion promote coating" that involves forming a "dendritic oxide coating" by bathing in a "water base bath" in order to bond an electroplated copper layer to a dielectric substrate.
Gregoire, U.S. Pat. No. 5,334,279, relates to a PB tool for producing three-dimensional PB's having grooves with strongly bonded or laminated metallic pads therein. The circuit board tool comprises a metallized male mold substrate having a plurality of groove forming projections. The metalized mold substrate is made from a female parent or predecessor master tool. The patent articulates a three-dimensional PB that employs a high heat deflective plastic, without defining the plastic, and a plurality of recesses or grooves molded into the substrate surface for receiving the fine pitch, closely spacedapart leads, of an integrated circuit.
Gregoire, U.S. Pat. No. 5,351,393, is another patent in this area.
The Gregoire and Parker patents, all assigned to Dimensional Circuits Corp., directed to technology for simplifying PB manufacture, demonstrate the complexity of making tools and making PB's from the tools. One of the reasons for such complexity is that the materials of construction that are used for tool making and for printed wire boards are undefined or improperly designed for a simple and effective PB construction that avoid CTE mismatches and for making tools that can be used in shaping plastics and resins into printed wire board substrates, whether containing or not containing grooves and cavities.
The art of making PB's is restricted by the processes and material from which they are made. Labor intensive techniques such as stenciling, silk screening, masking, etching, and the like, drive up the cost of PB's. There is a need for a simple and cost effective method for making PB's that has the capacity of minimizing the required use of labor intensive techniques.